SoC系统级等价性检查理论与关键技术

项目名称： SoC系统级等价性检查理论与关键技术

项目编号： No.61272335

项目类型： 面上项目

立项/批准年度： 2013

项目学科： 自动化技术、计算机技术

项目作者： 李暾

作者单位： 中国人民解放军国防科学技术大学

项目金额： 81万元

中文摘要： SOC系统级功能验证已成为SOC系统设计周期的瓶颈。针对SoC系统级功能验证由于各层巨大差异带来的重复工作多、验证效率低下等突出问题，本项目研究SoC系统级等价性检查技术，在理论和实践上对SoC系统级功能验证取得突破。研究高层次建模与模型等价性理论、SoC系统功能行为描述与TLM描述间、TLM描述与RTL实现间等价性检查算法等理论与技术，突破时序匹配、路径匹配、割点识别与插入、设计化简、约束编码和SMT优化等关键技术，建立SoC系统级等价性检查理论方法体系，实现支持SoC高层等价性检查的系列工具原型，研究成果将直接用于典型SoC系统的设计验证。 所研究建立的模型、理论框架、方法在验证科学领域达到国际领先水平，有效提高SoC系统级验证效率和完备性，为我国自主SoC系统的可持续发展奠定坚实基础。

中文关键词： 芯片系统；系统级设计；等价性检查；机器学习；高级综合

英文摘要： The SOC system-level functional verification has become the bottleneck of the SOC system design process. To solve the problems such as duplicated and low efficiency verification work in system level designs brought by huge differences among them, this proposal focuses on theory and technology of equivalence checking between SoC system level designs and try to make break through. The research topics include high-level modeling and equivalence theory, equivalence checking algorithms between SoC behavioral descriptions and Transaction-Level models, and eqivalence checking algorithms between Transaction-level models and Register-Transmit level implementations. We are going to break through in following key areas such as timing matching, path matching, cut-point identification and insertion, design reduction, constraints encoding and SMT solver optimization. Finally, we will establish theory framework for SoC system level equivalence checking and implement prototype of a series of tools to support SoC high-level equivalence checking to effectively improve the efficiency of SoC system-level functional verification and completeness. Research results will be applied directly to the functional verification of some typical SoC designs. The research results are to reach the advance level of related fields, and lay a solid

英文关键词： System-on-a-Chip；System level design；equivalence checking；machine learning；high level synthesis