Are micro-architectural features able to explain faulty executions in the presence of soft errors? A preliminary study

Soft errors induced by radiations are one of the most challenging issues impacting the electronic systems' reliability. In the embedded domain, system designers often rely on Double Modular Redundancy (DMR) to reach the desired level of reliability. This solution has increasing overhead, given the complexity achieved by modern microprocessors in all domains. This paper addresses the promising field of using efficient machine-learning powered cores for the detection of soft errors. To create such cores and make them general enough to work with different software applications, microarchitectural attributes are a fascinating option as candidate fault detection features. Several processors already track these features through dedicated Performance Monitoring Units. However, there is an open question to understand to what extent they are enough to detect faulty executions. This paper moves a step forward in this direction. Exploiting the capability of \textit{gem5} to simulate real computing systems, perform fault injection experiments and profile microarchitectural attributes (i.e., \textit{gem5} Stats), this paper presents the results of a comprehensive analysis regarding the potential attributes to be used for soft error detection and associated models that can be trained with these features. Particular emphasis was devoted to understanding whether event timing could bring additional information to the detection task. This information is crucial to identify the best machine learning models to employ in this challenging task.